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 SSM95T06GP,S
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Low gate-charge Simple drive requirement Fast switching G
D
BV DSS R DS(ON) ID
60V 8.5m 75A
S
Description
The SSM95T06S is in a TO-263 package, which is widely used for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. The through-hole version, the SSM95T06P in TO-220, is available for low-footprint vertical mounting. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. G GD S
TO-263 (S)
Pb-free lead finish (second-level interconnect)
D
TO-220(P)
S
Absolute Maximum Ratings
Symbol VDS VGS ID @ TC=25C ID @ TC=100C IDM PD @ TC=25C EAS IAR TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current
1 3
Rating 60 20 75 66 260 138 1.11
4
Units V V A A A W W/C mJ A C C
Total Power Dissipation Linear Derating Factor Single Pulse Avalanche Energy Avalanche Current Storage Temperature Range Operating Junction Temperature Range
450 30 -55 to 150 -55 to 150
Thermal Data
Symbol Rthj-c Rthj-a Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max. Max. Value 0.9 62 Units C/W C/W
2/16/2005 Rev.1.10
www.SiliconStandard.com
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SSM95T06GP,S
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol BVDSS Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=1mA Min. 60 1 Min. Typ. 0.05 72 72 16 53 20 76 67 109 900 560 1.1 Typ. 40 60 Max. Units 8.5 12 3 10 100 100 115 1.7 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/ Tj
RDS(ON)
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA
Static Drain-Source On-Resistance2
VGS=10V, ID=45A VGS=4.5V, ID=20A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg Symbol VSD trr Qrr
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=150 C)
o o
VDS=VGS, ID=250uA VDS=10V, ID=45A VDS=60V, VGS=0V VDS=48V ,VGS=0V VGS= 20V ID=45A VDS=48V VGS=4.5V VDS=30V ID=45A RG=3.3 , VGS=10V RD=0.67 VGS=0V VDS=25V f=1.0MHz f=1.0MHz Test Conditions IS=45A, VGS=0V IS=20A, VGS=0V dI/dt=100A/s
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Parameter Forward On Voltage
2 2 2
5700 9200
Source-Drain Diode
Max. Units 1.3 V ns nC
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.The maximum current is limited by the package to 75A . 4.Starting Tj=25oC , VDD=30V , L=1mH , RG=25 , IAS=30A.
2/16/2005 Rev.1.10
www.SiliconStandard.com
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SSM95T06GP,S
250 120
T C = 25 o C
200
10V 7.0 V ID , Drain Current (A) 5.0V
T C = 150 C
o
ID , Drain Current (A)
10V 7.0 V 5.0V 4.5V
80
150
4.5V
100
40
V G =3.0V
50
V G =3.0V
0 0 3 6 9 12 0 0 3 6 9 12
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
11
1.6
I D =20A
10
T C =25 C Normalized R DS(ON)
1.2
o
I D =45A V G =10V
RDS(ON) (m )
9
0.8
8
7 2 4 6 8 10
0.4 -50 0 50 100 150
V GS Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
o
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
2.0
50
40
Normalized VGS(th) (V)
1.5
IS(A)
30
T j =150 o C
20
1.0
T j =25 o C
0.5 10
0 0 0.2 0.4 0.6 0.8 1 1.2 1.4
0.0 -50 0 50 100 150
V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( C)
o
Fig 5. Forward Characteristic of Reverse Diode
2/16/2005 Rev.1.10
Fig 6. Gate Threshold Voltage vs. Junction Temperature
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SSM95T06GP,S
f=1.0MHz
12 10000
VGS , Gate to Source Voltage (V)
I D = 45 A
10
C iss
8
V DS = 30 V V DS = 38 V V DS = 48 V C (pF)
1000
6
C oss C rss
4
2
0 0 20 40 60 80 100 120
100 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS ,Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1000
1
Normalized Thermal Response (Rthjc)
Duty factor=0.5
100
0.2
ID (A)
100us 1ms
10
0.1
0.1
0.05
0.02 0.01
PDM
10ms T c =25 o C Single Pulse
1
t T
Duty factor = t/T Peak Tj = PDM x Rthjc + TC
100ms DC
10 100 1000
Single Pulse
0.01
0.1
1
0.00001
0.0001
0.001
0.01
0.1
1
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
130
V DS =5V
104
VG
T j =25 o C T j =150 o C
ID , Drain Current (A)
QG 4.5V
78
QGS
52
QGD
26
Charge
0 0 2 4 6
Q
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
Fig 12. Gate Charge Waveform
2/16/2005 Rev.1.10
www.SiliconStandard.com
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SSM95T06GP,S
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
2/16/2005 Rev.1.10
www.SiliconStandard.com
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